DAEDALUS based architectures for smart LED lighting control systems (DAEDALED)

According to Directive 2005/32/EC of the European Parliament and to the Council of the European Union of 06.07.2005, the energy efficiency is of a great importance for evaluating the operation of every system.  The accepted goal by the European Commission in 2007: strategy 20‐20‐20 is related to 20% reduction of energy consumption by 2020 (20% increase of energy efficiency, 20% reduction of CO2 emissions, and 20% renewables by 2020). As the acceleration of country urbanization, road lighting develops quickly. Nowadays LEDs have the advantage to produce the same lumen output as the traditional fixtures but consuming half of their energy. Also they have the benefit of the long life, rated to last 20 years and more. Another advantage like the ability for dimming widens LEDs application and allows new features of the lighting which are impossible for the existing equipment. In addition the efficiency increases more when the streetlights are organized in a network. Thus the LED lighting of cities becomes dominating on the market as energy efficient and durable.

Incotex Group develops smart LED lighting solutions for customers all around the world. The company integrates one or more microcontrollers in their products and therefore the city network of lights may be compared to a distributed embedded system. And here a typical problem of an embedded system arises – one cannot achieve perfect symmetry between the hardware platform and software applications. This means that finding optimal mapping of software processes to hardware components is of great concern. The purpose of this TTP is to integrate embedded system development tools in deployment of smart city lights and achieve savings in terms of hardware (which means less cost) or software execution time (which means better application performance). The chosen framework of tools is called DAEDALUS and is developed by Leiden University, the Netherlands with whom Technical University – Sofia, Bulgaria cooperates tightly.

A part of the DAEDALUS design flow includes an optimization framework called SESAME that is used for finding optimal mappings in embedded systems (Fig. 1).


Fig. 1 – DAEDALUS high‐level synthesis and optimization tools.

In theory Incotex could use this tool for its needs directly. In practice however this is a daunting task due to the high number of parameters that have to be entered. Such parameters include number of processes, their names, their C++ application models, hardware components, input/output ports, component cost, execution time, default mapping, etc. If this is done for one, or even ten nodes, it is doable within half‐ or one hour with the help of a SESAME graphical editor. But the problem is that a city consists of tens of hundreds LED lamps, intermediate components (called Concentrators) and main stations. The development time would be increased drastically. There is a missing link between SESAME and this practical problem, and the goal of this TTP project is to automate the process of parameter input to SESAME. This means that an application with simple GUI must be developed that requires the user to input only the important parameters of the city network and automatically fill in the rest of them.

Such program was implemented and the GUI plus its internal structure is shown in Fig. 2. Using the graphical interface the user inputs basic information about the LED lamps, the intermediate devices and the main stations. Afterwards the button Generate is pressed. This invokes four basic methods of the program: generate a project template, generate application XML (with its corresponding C++ code), generate XML of the platform (that is actually a model of the city LED network) and generate a default XML mapping. The top‐level directory contains application and architecture directories. The application directory includes an XML description of a Kahn Process Network (KPN) that reflects the city structure. Each lamp has a KPN node assigned to it. Same goes for the concentrator. The main station however has more than one node that map to it. This reflects the user applications that can be executed on different main stations and possibly on concentrators. Links between nodes are substituted with FIFO buffers in the architecture layer which is required for simulating the system. In reality no such devices exist. The links between devices are simple set of wires. That’s the reason the latency of FIFO buffers is set to 1 cycle by default. All the generated files are gathered in a directory that has a specific structure to be recognized by SESAME’s editor. This project can be processed with the existing SESAME tools. One of them is a Design Space Exploration script that actually performs the optimization using random mappings and a genetic algorithm to sift from. Each random mapping is simulated. When the optimization finishes, the Pareto fronts of the best mappings are plotted in a chart and text information is displayed in the console. Optimal mappings in terms of cost and execution time are shown in a terminal and can be used by Incotex to optimize their network before deploying it to the customer.  The company needs to perform a small set of experiments in order to model each type of device correctly – information about the execution time (or also “latency”) and data token generation rate are needed for a LED smart lamp, concentrator and main station.


Fig. 2 - Daedaled Design Center – a tool for optimizing mapping of applications in a city smart LED network.

With the help of the TTP, the company Incotex will benefit from the developed tool in terms of LED network components cost and in terms of reduced application execution time. The technological transfer includes the SESAME’s design space exploration script which is part of DAEDALUS high‐level synthesis framework. Since many different mappings are shown to the developer, one may think of optimization specific to the current needs – sometimes LED network cost may be of greater importance than application execution time and vice versa.

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